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Cache memory
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#	Item
541	data sheet/VERSION 6.2 Composite Monitor Advantages The Composite Monitor provides many advantages, including: Add to Reading List Source URL: purl.manticoretechnology.com Language: English - Date: 2012-09-12 18:39:22 Computing Relational database management systems Computer memory Composite Software Cache Virtualization
542	1 SPARC T5: 16-core CMT Processor with Glueless 1-Hop Scaling to 8-Sockets 2 Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:27:15 CPU cache Cache Central processing unit SPARC Sandy Bridge SPARC T3 UltraSPARC T1 Computer hardware Computer architecture Computer memory
543	PDF Document Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:45:21 Alpha 21064 Dynamic random-access memory CPU cache Conventional PCI VRAM Memory controller DEC Alpha Random-access memory DEC 7000/10000 AXP Computer hardware Computer memory Computing
544	Tradeoffs in Buffering Speculative Memory State for Thread-Level Speculation in Multiprocessors ´ GARZARAN ´ MAR´ıA JESUS Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2006-02-05 01:16:31 Central processing unit Computer memory Parallel computing Microarchitecture Process Circular buffer Reduced instruction set computing Cache Computing Computer hardware Computer architecture
545	Empowering Software Debugging Through Architectural Support for Program Rollback Radu Teodorescu and Josep Torrellas Department of Computer Science University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2005-07-29 18:41:35 Central processing unit Computer memory Computer errors Speculative execution CPU cache Kernel Debugging Microarchitecture Software bug Computing Computer architecture Computer hardware
546	Refrint: Intelligent Refresh to Minimize Power in On-Chip Multiprocessor Cache Hierarchies∗ Aditya Agrawal, Prabhat Jain, Amin Ansari and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-01-25 16:45:45 CPU cache Dynamic random-access memory Memory refresh EDRAM Cache MESI protocol Random-access memory Memory hierarchy Computer data storage Computer memory Computer hardware Computing
547	Mosaic: Exploiting the Spatial Locality of Process Variation to Reduce Refresh Energy in On-Chip eDRAM Modules ∗ Aditya Agrawal, Amin Ansari and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma. Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2014-01-14 22:55:13 Computing EDRAM Memory refresh Dynamic random-access memory CPU cache Bloom filter Tile Cache Computer memory Computer hardware Visual arts
548	Scalable   Cache Miss Handling   For High MLP James Tuck, Luis Ceze, and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2011-01-01 23:58:17 Computer engineering Computer memory Microprocessors CPU cache Cache Memory-level parallelism Runahead Intel Core Microarchitecture Computer architecture Computer hardware Central processing unit
549	Rebound: Scalable Checkpointing for Coherent Shared Memory Rishi Agarwal, Pranav Garg, and Josep Torrellas University of Illinois at Urbana-Champaign, USA {agarwa29,garg11,torrella}@illinois.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2011-04-01 11:24:25 Central processing unit Microprocessors Application checkpointing Computer memory Parallel computing CPU cache Multi-core processor AMD 10h Microarchitecture Computer architecture Computer hardware Computing
550	Microsoft PowerPoint - present_micro00 [Compatibility Mode] Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-30 23:33:48 Computing Central processing unit Thermodynamics Dynamic random-access memory Dynamic voltage scaling CPU cache Temperature Computer hardware Computer memory Energy conservation

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